<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
  <meta charset="utf-8" />
  <meta name="generator" content="pandoc" />
  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
  <title>Release Notes for STM32F1xx CMSIS</title>
  <style type="text/css">
      code{white-space: pre-wrap;}
      span.smallcaps{font-variant: small-caps;}
      span.underline{text-decoration: underline;}
      div.column{display: inline-block; vertical-align: top; width: 50%;}
  </style>
  <link rel="stylesheet" href="_htmresc/mini-st.css" />
  <!--[if lt IE 9]>
    <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
  <![endif]-->
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<div class="card fluid">
<div class="sectione dark">
<center>
<h1 id="release-notes-for-stm32f1xx-cmsis"><strong>Release Notes for STM32F1xx CMSIS</strong></h1>
<p>Copyright © 2016 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="./_htmresc/st_logo.png" alt="ST logo" /></a>
</center>
</div>
</div>
<h1 id="license"><strong>License</strong></h1>
This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
<center>
<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
</center>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_3" checked aria-hidden="true"> <label for="collapse-section4_3_3" aria-hidden="true"><strong>V4.3.3 / 21-May-2021</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Improve GCC startup files robustness.</li>
<li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
<li>Add atomic register access macros.</li>
<li>File “startup_stm32f105xc.s” updated to call static constructors.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_2" aria-hidden="true"> <label for="collapse-section4_3_2" aria-hidden="true"><strong>V4.3.2 / 07-September-2020</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS</li>
<li>SystemInit(): update to don’t reset RCC registers to its reset values.</li>
<li>TIM:
<ul>
<li>Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro</li>
</ul></li>
<li>I2S:
<ul>
<li>Add missing I2SCFG and I2SPR bits difinitions for STM32F101xE and STM32F101xG</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_1" aria-hidden="true"> <label for="collapse-section4_3_1" aria-hidden="true"><strong>V4.3.1 / 26-June-2019</strong></label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Fix MISRA C 2012 Compilation errors: update to use “UL” postfix for bits mask definitions(_Msk) and memory/peripheral base addresses</li>
<li>Fix wrong initialization value for “SystemCoreClock” in System_stm32f1xx.c file</li>
<li>Update gcc linker file template to be aligned with AC6 linker file template</li>
<li>stm32f1xx.h
<ul>
<li>Align ErrorStatus typedef to common error handling</li>
</ul></li>
<li>TIM:
<ul>
<li>Update IS_TIM_SLAVE_INSTANCE() macro to add reference to TIM9 instance</li>
</ul></li>
<li>SDMMC:
<ul>
<li>Remove SDIO_TypeDef() structure, SDIO_BASE define and SDIO Bits definitions : feature not available on all devices except <strong>STM32F103xE</strong> and <strong>STM32F103xG</strong></li>
</ul></li>
<li>USB:
<ul>
<li>Add new PCD/HCD macros:
<ul>
<li>IS_PCD_ALL_INSTANCE()</li>
<li>IS_HCD_ALL_INSTANCE()</li>
</ul></li>
</ul></li>
<li>SPI:
<ul>
<li>Add new SPI_CRC_ERROR_WORKAROUND_FEATURE define to enable SPI CRC workaround feature for <strong>STM32F101xE/STM32F103xE</strong> devices</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_0" aria-hidden="true"> <label for="collapse-section4_3_0" aria-hidden="true"><strong>V4.3.0 / 09-October-2018</strong></label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Add missing IS_TIM_SYNCHRO_INSTANCE macro definition to check TIM SYNCHRO feature instance support.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_2_0" aria-hidden="true"> <label for="collapse-section4_2_0" aria-hidden="true"><strong>V4.2.0 / 31-March-2017</strong></label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Use _Pos and _Mask macros for all Bit Definitions</li>
<li>Remove Core-CM3 bit definitions from CMSIS devices drivers: duplicated with bit definitions in core_cm3.h.</li>
<li>General updates in header files to support LL drivers
<ul>
<li>Remove TIM SMCR OCCS and TIM CCER CC4NP bit definitions</li>
<li>Add new USART defines: USART_CR1_OVER8 and USART_CR3_ONEBIT</li>
<li>Add I2C_DR_DR bit definition</li>
<li>Add new I2C macros: IS_SMBUS_ALL_INSTANCE</li>
<li>Add new LL I2S defines: SPI_I2S_SUPPORT and I2S2_I2S3_CLOCK_FEATURE</li>
<li>Rename DAC instance to DAC1</li>
<li>Rename PWR_CR_PLS_<strong>XXX</strong> to PWR_CR_PLS_LEV<strong>X</strong></li>
<li>Add RCC LL defines
<ul>
<li>RCC_HSE_MIN</li>
<li>RCC_HSE_MAX</li>
<li>RCC_MAX_FREQUENCY</li>
<li>RCC_PLL_SUPPORT</li>
<li>RCC_PLLI2S_SUPPORT</li>
</ul></li>
<li>Add new TIM macros to check TIM feature instance support:
<ul>
<li>IS_TIM_COUNTER_MODE_SELECT_INSTANCE()</li>
<li>IS_TIM_ADVANCED_INSTANCE</li>
<li>IS_TIM_ETR_INSTANCE</li>
<li>IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE</li>
<li>IS_TIM_32B_COUNTER_INSTANCE</li>
<li>IS_TIM_BREAK_INSTANCE()</li>
<li>IS_TIM_CCXN_INSTANCE()</li>
<li>IS_TIM_REPETITION_COUNTER_INSTANCE()</li>
<li>IS_TIM_COMMUTATION_EVENT_INSTANCE()</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_1_0" aria-hidden="true"> <label for="collapse-section4_1_0" aria-hidden="true"><strong>V4.1.0 / 29-April-2016</strong></label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Add _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value).
<ul>
<li>The previous naming are kept for backward compatibility.</li>
</ul></li>
<li>RCC: Add define RCC_CFGR_MCOSEL for compatibility across all STM32 series.</li>
<li>ADC: Add define ADC_MULTIMODE_SUPPORT for devices supporting the ADC multimode feature.</li>
<li>ADC: Add define ADC_SR_EOS and ADC_SR_JEOS for compatibility accross all STM32 series.</li>
<li>stm32f1xx.h: Replace __STM32F1xx_CMSIS_DEVICE_VERSION_MAIN by __STM32F1_CMSIS_VERSION_MAIN for MISRA compliancy on define length name.</li>
<li>Add APBPrescTable constant to list APB prescalers values.</li>
<li>Add FLASHSIZE_BASE for the FLASH Size register base address.</li>
<li>Add UID_BASE for the unique device ID register base address.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_2" aria-hidden="true"> <label for="collapse-section4_0_2" aria-hidden="true"><strong>V4.0.2 / 18-December-2016</strong></label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>FLASH: Add FLASH_OBR_DATA0 and FLASH_OBR_DATA1 for FLASH_OBR register.</li>
<li>WWDG: Align bit name across all STM32 families.
<ul>
<li>WWDG_CR_T0 renmaed to WWDG_CR_T_0.</li>
<li>WWDG_CFR_W0 renamed to WWDG_CFR_W_0.</li>
<li>WWDG_CFR_WDGTB0 renamed to WWDG_CFR_WDGTB_0.</li>
<li>WWDG_CFR_WDGTB1 renamed to WWDG_CFR_WDGTB_1.</li>
</ul></li>
<li>Interrupt: Add HardFault_IRQn with value -13.</li>
<li>EXTI:: Align bit name across all STM32 families.
<ul>
<li>EXTI_IMR_MR0 renamed to EXTI_IMR_IM0.</li>
<li>EXTI_EMR_MR0 renamed to EXTI_EMR_EM0.</li>
<li>EXTI_RTSR_TR0 renamed to EXTI_RTSR_RT0.</li>
<li>EXTI_FTSR_TR0 renamed to EXTI_FTSR_FT0.</li>
<li>EXTI_SWIER_SWIER0 renamed to EXTI_SWIER_SWI0.</li>
<li>EXTI_PR_PR0 renamed to EXTI_PR_PIF0.</li>
<li>Aliases are created for backward compatibilities.</li>
</ul></li>
<li>USB OTG: Remove USB_OTG_GCCFG_NOVBUSSENS from USB_OTG_GCCFG as this feature is not present in F1 devices.</li>
<li>USB_OTG: Remove USB_OTG_GCCFG_I2CPADEN from USB_OTG_GCCFG as this feature is not present in F1 devices.</li>
<li>ADC: Add the notion of common instance for compatibility with other STM32 families.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_1" aria-hidden="true"> <label for="collapse-section4_0_1" aria-hidden="true"><strong>V4.0.1 / 31-July-2015</strong></label>
<div>
<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>Remove __IO or __I on constant table declaration (AHBPrescTable in system_stm32f1xx.c) due to issue with mbed C++ code. The table content was filled with random value at initialization phase.</li>
<li>uint8_t alignment done on CMSIS CRC registers structure.</li>
<li>Removing definition of FLASH_WRP1_WRP1, FLASH_WRP1_nWRP1, FLASH_WRP2_WRP2, FLASH_WRP2_nWRP2, FLASH_WRP3_WRP3 and FLASH_WRP3_nWRP3 for product STM32F101x6, STM32F102x6 and STM32F103x6. Those defines are not applicable to those products.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_0" aria-hidden="true"> <label for="collapse-section4_0_0" aria-hidden="true"><strong>V4.0.0 / 16-December-2014</strong></label>
<div>
<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>Update based on STM32Cube specification</li>
<li><strong>This version has to be used only with STM32CubeF1 based development</strong></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_3" aria-hidden="true"> <label for="collapse-section3_6_3" aria-hidden="true"><strong>V3.6.3 / 10-April-2014</strong></label>
<div>
<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_2" aria-hidden="true"> <label for="collapse-section3_6_2" aria-hidden="true"><strong>V3.6.2 / 28-February-2013</strong></label>
<div>
<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>stm32f10x.h
<ul>
<li>Change <em>#define FLASH_ACR_LATENCY ((uint8_t)<strong>0x03</strong>)</em> by #define <em>FLASH_ACR_LATENCY ((uint8_t)<strong>0x07</strong>)</em></li>
<li>Remove ‘<strong>,</strong>’ from #define <em>DMA_CCR7_PSIZE , ((uint16_t)0x0300)</em></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_1" aria-hidden="true"> <label for="collapse-section3_6_1" aria-hidden="true"><strong>V3.6.1 / 09-March-2012</strong></label>
<div>
<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>All source files: license disclaimer text update and add link to the License file on ST Internet.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_0" aria-hidden="true"> <label for="collapse-section3_6_0" aria-hidden="true"><strong>V3.6.0 / 27-January-2012</strong></label>
<div>
<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>Update directory structure to be compliant with CMSIS V2.1</li>
<li>All source files: update disclaimer to add reference to the new license agreement</li>
<li>stm32f10x.h
<ul>
<li>Add define for Cortex-M3 revision __<em>CM3_REV</em></li>
<li>Allow modification of some constants by the application code, definition of these constants is now bracketed by <em>#if !defined</em>. The concerned constant are <em>HSE_VALUE</em>, <em>HSI_VALUE</em> and <em>HSE_STARTUP_TIMEOUT</em></li>
<li>Add missing bits definition for <em>DAC CR</em> register</li>
<li>Add missing bits definition for <em>FSMC BTR1</em>, _BTR2__, <em>BTR3</em>, <em>BWTR1</em>, <em>BWTR2</em>, <em>BWTR3</em> and <em>BWTR4</em> registers</li>
<li>Definition for Flash keys moved from stm32f10x_flash.c to stm32f10x.h</li>
</ul></li>
<li>V3.5.0 (based CMSIS V1.3) vs. V3.6.0 (based on CMSIS V2.1) compatibility update
<ul>
<li>Due to the directory structure difference between CMSIS V1.3 and V2.1, when migrating a project based on STM32F10x drivers V3.5.0 to V3.6.0 you need to perform the following update:
<ul>
<li>Rename ADC1_COMP_IRQn to ADC1_IRQn</li>
<li>In the compiler preprocessor, remove CortexM3 CMSIS include path. CortexM3 CMSIS files are included by default in your development toolchain</li>
<li>Remove core_cm3.c file (if it is used). Almost of CortexM3 CMSIS_ function are provided as intrinsic by the compiler</li>
<li>In the compiler preprocessor, update path of _STM32F10x CMSIS include files from <em>Libraries332F10x to Libraries32F10x</em></li>
<li>In the project settings, update path of <em>startup_stm32f10x_xx.s</em> file from <em>Libraries332F10x”Compiler”</em> to <em>Libraries32F10x”Compiler”</em> where, “Compiler” refer to arm, gcc_ride7, iar, TASKING or TrueSTUDIO</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_5_0" aria-hidden="true"> <label for="collapse-section3_5_0" aria-hidden="true"><strong>V3.5.0 / 11-March-2011</strong></label>
<div>
<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li><em>stm32f10x.h</em> and <em>startup_stm32f10x_hd_vl.s</em> files: remove the FSMC interrupt definition for STM32F10x High-density Value line devices.</li>
<li>system_stm32f10x.c file provided within the CMSIS folder.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_4_0" aria-hidden="true"> <label for="collapse-section3_4_0" aria-hidden="true"><strong>V3.4.0 / 15-October-2010</strong></label>
<div>
<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>General
<ul>
<li>Add support for <strong>STM32F10x High-density Value line devices</strong>.</li>
</ul></li>
<li>STM32F10x CMSIS Device Peripheral Access Layer
<ul>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: <em><strong>stm32f10x.h</strong></em>
<ul>
<li>Update to support High-density Value line devices
<ul>
<li>Add new define <em>STM32F10X_HD_VL</em></li>
<li>RCC, AFIO, FSMC bits definition updated</li>
</ul></li>
<li>All STM32 devices definitions are commented by default. User has to select the appropriate device before starting else an error will be signaled on compile time.</li>
<li>Add new IRQs definitions inside the IRQn_Type enumeration for STM23 High-density Value line devices.</li>
<li>“<strong>bool</strong>” type removed.</li>
</ul></li>
</ul></li>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: <em><strong>system_stm32f10x.h</strong></em> and <em><strong>system_stm32f10x.c</strong></em>
<ul>
<li>“<em><strong>system_stm32f10x.c</strong></em>” moved to to “<em><strong>STM32F10x_StdPeriph_Template</strong></em>” directory. This file is also moved to each example directory under “<strong>STM32F10x_StdPeriph_Examples</strong>”.</li>
<li>SystemInit_ExtMemCtl() function: update to support High-density Value line devices.</li>
<li>Add “VECT_TAB_SRAM” inside “<em><strong>system_stm32f10x.c</strong></em>” to select if the user want to place the Vector Table in internal SRAM. An additional define is also to specify the Vector Table offset “VECT_TAB_OFFSET”.</li>
</ul></li>
<li>STM32F10x CMSIS startup files:<em><strong>startup_stm32f10x_xx.s</strong></em>
<ul>
<li>Add three startup files for STM32 High-density Value line devices: <em><strong>startup_stm32f10x_hd_vl.s</strong></em></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_3_0" aria-hidden="true"> <label for="collapse-section3_3_0" aria-hidden="true"><strong>V3.3.0 / 16-April-2010</strong></label>
<div>
<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>General
<ul>
<li>Add support for <strong>STM32F10x XL-density devices</strong>.</li>
<li>Add startup files for TrueSTUDIO toolchain</li>
</ul></li>
<li><strong>STM32F10x CMSIS Device Peripheral Access Layer</strong>
<ul>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: <em><strong>stm32f10x.h</strong></em>
<ul>
<li>Update to support XL-density devices
<ul>
<li>Add new define STM32F10X_XL</li>
<li>Add new IRQs for TIM9..14</li>
<li>Update FLASH_TypeDef structure</li>
<li>Add new IP instances TIM9..14</li>
<li>RCC, AFIO, DBGMCU bits definition updated</li>
</ul></li>
<li>Correct IRQs definition for MD-, LD-, MD_VL- and LD_VL-density devices (remove comma “,” at the end of enum list)</li>
</ul></li>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: <em><strong>system_stm32f10x.h</strong></em> and <em><strong>system_stm32f0xx.c</strong></em>
<ul>
<li>SystemInit_ExtMemCtl() function: update to support XL-density devices</li>
<li>SystemInit() function: swap the order of SetSysClock() and SystemInit_ExtMemCtl() functions.</li>
</ul></li>
<li>STM32F10x CMSIS startup files:
<ul>
<li>add three startup files for STM32 XL-density devices: <em><strong>startup_stm32f10x_xl.s</strong></em></li>
<li><em><strong>startup_stm32f10x_md_vl.s</strong></em> for RIDE7: add USART3 IRQ Handler (was missing in previous version)</li>
<li>Add startup files for TrueSTUDIO toolchain</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3_2_0" aria-hidden="true"> <label for="collapse-section3_2_0" aria-hidden="true"><strong>V3.2.0 / 01-March-2010</strong></label>
<div>
<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li>General
<ul>
<li>STM32F10x CMSIS files updated to <strong>CMSIS V1.30</strong> release</li>
<li>Directory structure updated to be aligned with CMSIS V1.30</li>
<li>Add support for <strong>STM32 Low-density Value line (STM32F100x4/6)</strong> and <strong>Medium-density Value line (STM32F100x8/B) devices</strong>.</li>
</ul></li>
<li>CMSIS Core Peripheral Access Layer</li>
<li><strong>STM32F10x CMSIS Device Peripheral Access Layer</strong>
<ul>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File: <em><strong>stm32f10x.h</strong></em>
<ul>
<li>Update the stm32f10x.h file to support new Value line devices features: CEC peripheral, new General purpose timers TIM15, TIM16 and TIM17.</li>
<li>Peripherals Bits definitions updated to be in line with Value line devices available features.</li>
<li>HSE_Value, HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE, HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy purposes.</li>
</ul></li>
<li>STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files: <em><strong>system_stm32f10x.h</strong></em> and <em><strong>system_stm32f10x.c</strong></em>
<ul>
<li>SystemFrequency variable name changed to SystemCoreClock</li>
<li>Default SystemCoreClock is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.</li>
<li>All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.</li>
<li>Additional function <em><strong>void SystemCoreClockUpdate (void)</strong></em> is provided.</li>
</ul></li>
<li>STM32F10x CMSIS Startup files: <em><strong>startup_stm32f10x_xx.s</strong></em>
<ul>
<li>Add new startup files for STM32 Low-density Value line devices: <em><strong>startup_stm32f10x_ld_vl.s</strong></em></li>
<li>Add new startup files for STM32 Medium-density Value line devices: <em><strong>startup_stm32f10x_md_vl.s</strong></em></li>
<li>SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file</li>
</ul></li>
</ul></li>
<li>GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.</li>
</ul>
</div>
</div>
</div>
</div>
<footer class="sticky">
For complete documentation on STM32 Microcontrollers </mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/stm32">www.st.com/stm32</a></span> <em>This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.</em>
</footer>
</body>
</html>
